This invention relates generally to the design of integrated circuits and more particularly to the automated design of analog integrated circuits.
As integrated circuits (ICs) have grown larger and more complex there has been an increasing trend to automate their design. This is particularly the case with application-specific integrated circuits (ASICs) which are semi-custom ICs designed to a customer's specifications. ASICs include gate arrays in which only the metallization masks are different for each ASIC design, standard cells in which all of the mask layers are customized, and hybrid combinations of the two. Typically, automated design programs utilizing libraries of existing circuits are used to design the custom masks of ASICs.
Automation of the design process for digital integrated circuits is relatively well developed. The high density, cell uniformity, and repeatability of digital circuitry is well adapted to automated design process and, in consequence, there are many useful software tools available to aid in digital IC design. In contrast, analog circuitry has a more irregular topology, a much greater range of device sizes and typically greater circuit complexity, rendering tools made for automated digital design generally inapplicable. In consequence, the design tools for analog or analog/digital circuitry are frequently crude or not available.
A traditional, prior art method for automated analog IC design is shown in FIG. 1. First, the system specifications for the IC are chosen and then a block diagram of the individual circuits within the system is developed. Next, the individual circuit specifications are chosen and the individual circuits are designed. As indicated by the return arrow, this is an iterative process where tentative designs for the individual circuits are compared against their specifications and repeatedly modified as necessary to meet these specifications. Once the circuit design has been completed, the entire system is simulated in a simulator such as SPICE (originally designed at the University of California at Berkeley). If the system does not meet specifications, the individual circuit specifications are modified and the circuit design step is repeated. Finally, the circuit layout is compared against the system specifications which may result in additional modifications to the individual circuit specifications and designs.
A problem with this prior art design method is that it is an iterative process requiring a number of distinct design tools and substantial human intervention. Each of the design steps shown in FIG. 1 is typically performed using a different set of software tools and the result of each step must be evaluated by an experienced system designer to determine whether an iterative redesign step is required. The prior art process is therefore quite wasteful of human and machine resources and, in consequence, is a slow and expensive solution to analog IC design.
Another reason that digital design tools have not been adapted for use in designing analog or analog/digital circuitry is that digital device modules for devices such as transistors are very inefficient when they are enlarged to handle the higher currents required by analog circuitry. Typically, digital device modules are made as small as possible to maximize their switching speed and to minimize their power requirements. In consequence, the metal interconnections between digital device modules are between modules rather than over the modules. This design methodology turns out to be very inefficient with analog circuitry. Also, digital device modules are not designed for the production of transistor devices of varying sizes and current capabilities.
Since digital design tools are not particularly useful in analog IC design and since conventional analog design tools tend to be crude, slow and expensive, complex analog or analog/digital ASIC designs are an expensive and infrequently used option. What the prior art fails to provide, then, is an analog design tool which permits the rapid, inexpensive and automated assembly of analog and analog/digital circuits with efficient and scalable device modules.